Berkeley Out-of-Order Machine

BOOM is Berkeley's out-of-order core generator. Our goal is to provide a readable, open-source implementation for use in education, research, and industry.

BOOM is a synthesizable, parameterized, superscalar out-of-order RISC-V core designed to serve as the prototypical baseline processor for future micro-architectural studies of out-of-order processors.

BOOM is written in Chisel, a hardware construction language that allows for highly parameterized designs. BOOM also leverages the open-source Rocket-Chip SoC generator, allowing us to quickly bring up an entire multi-core processor system (including caches and uncore) by replacing the in-order Rocket core with an out-of-order BOOM core. BOOM supports RV64GC, atomics, IEEE 754-2008 floating-point, and much more. We have demonstrated BOOM running RISC-V Linux, RISC-V Fedora, SPEC CINT2006, SPECint 2017, and CoreMark.

More information can be found in the BOOM website. There you can find links to the relevant code repositories, publications, contact information, and more!