MIDAS — Modeling Infrastructure for Debugging and Simulation — is the Chisel library and FIRRTL compiler that lies at the heart of FireSim. MIDAS aims to support simulation of arbitrarily large digital systems (ranging froms single-chip multiprocessors to a warehouse-scale computers like FireBox) on a heterogenous host-platform consisting of FPGAs and CPUs.

To avoid confusion when speaking of computers simulating computers, we refer to the computer being simulated as the target, and the computer performing the simulation as the host.

Project Goals

Three major goals of MIDAS are:

  1. Enable simulation of arbitrarily large digital systems at speeds reaching those of direct FPGA prototypes. We want to run the real-and-complete benchmarks on the target machine.
  2. Reduce the engineering effort required to host a simulation. RAMP and DIABLO, in additional to inheriting many of the challenges of using FPGAs for emulation, required handwritten models that are difficult to implement.
  3. Provide powerful debugging tools, that hide underlying host-platform architecture. Users should be able to figure out what's wrong with their design without knowing a priori how it is being hosted.

To achieve the goal of fast but easy-to-use, cycle-accurate full-system simulation, MIDAS needs to support hosting simulators over multiple FPGAs and CPUs. Here MIDAS borrows extensively from the RAMP project, which developed key abstractions and techniques to ameliorate many of the challenges of use conventional FPGA prototypes.

While RAMP simulators were fast, they were difficult to implement as they required handwritten descriptions of these FAME models. MIDAS reduces this effort by generating bit-exact models from ASIC RTL that conform to the same RAMP-designed abstractions for specifying the target-design. This lets us easily build very detailed, RAMP-style decoupled simulators, that require little to no validation.

For parts of the target that cannot easily be transformed from an RTL implementation, MIDAS provides its own high-fidelity, reconfigurable, timing models. Once such example is FASED, which we use to provide large last-level caches and DRAM memory systems in the target design.

Finally, MIDAS provides powerful debugging tools that let the user reason about bugs in their target without needing to be aware of how the simulator is being hosted. Here we again lean on FIRRTL to inject debugging structures, such as scan-chains, and add instrumentation, like performance counters, automatically.